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IO96NDB2V1 Datasheet(PDF) 95 Page - Microsemi Corporation |
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IO96NDB2V1 Datasheet(HTML) 95 Page - Microsemi Corporation |
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95 / 242 page ![]() ProASIC3L Low Power Flash FPGAs Revision 13 2-79 Table 2-122 • 1.2 V LVCMOS High Slew Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V Applicable to Standard Plus I/O Banks Drive Strength Speed Grade tDOUT tDP tDIN tPY tEOUT tZL tZH tLZ tHZ tZLS tZHS Units 2 mA Std. 0.70 4.17 0.05 1.83 0.50 2.79 2.48 4.23 4.55 4.73 4.42 ns –1 0.60 3.54 0.04 1.56 0.43 2.37 2.11 3.60 3.87 4.02 3.76 ns Notes: 1. Software default selection highlighted in gray. 2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. |
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