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IO96NDB2V1 Datasheet(PDF) 67 Page - Microsemi Corporation

Part # IO96NDB2V1
Description  ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology
PDF  242 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

IO96NDB2V1 Datasheet(HTML) 67 Page - Microsemi Corporation

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ProASIC3L Low Power Flash FPGAs
Revision 13
2-51
Table 2-64 • Minimum and Maximum DC Input and Output Levels for LVCMOS 3.3 V Wide Range
Applicable to Standard Plus I/O Banks
3.3 V
LVCMOS
Wide
Range
Equivalent
Software
Default
Drive
Strength
Option1
VIL
VIH
VOL
VOH
IOL IOH IOSH IOSL
IIL
IIH
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VµA
µA
Max.
mA2
Max.
mA2
µA
µA
100 µA
2 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
25
27
10
10
100 µA
4 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
25
27
10
10
100 µA
6 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
51
54
10
10
100 µA
8 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
51
54
10
10
100 µA
12 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
103
109
10
10
100 µA
16 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100
100
103
109
10
10
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. Currents are measured at 85°C junction temperature.
3. All LVMCOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JDEC8-B specification
4. Software default selection highlighted in gray.



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