T89C51RD2-3CWC-M datasheet(13/86 Pages) ATMEL

13 / 86 page

Rev. F - 15 February, 2001

T89C51RD2

6.2. Dual Data Pointer Register Ddptr

The additional data pointer can be used to speed up code execution and reduce code size.

The dual DPTR structure is a way by which the chip will specify the address of an external data memory location.

There are two 16-bit DPTR registers that address the external memory, and a single bit called

DPS = AUXR1/bit0 (See Table 3.) that allows the program code to switch between them (Refer to Figure 3).

Figure 3. Use of Dual Pointer

Table 3. AUXR1: Auxiliary Register 1

Application

Software can take advantage of the additional data pointers to both increase speed and reduce code size, for

example, block operations (copy, compare, search ...) are well served by using one data pointer as a ’source’

pointer and the other one as a "destination" pointer.

ASSEMBLY LANGUAGE

AUXR1

Address 0A2H

GF3

DPS

Reset value

Symbol

Function

Not implemented, reserved for future use.a

User software should not write 1s to reserved bits. These bits may be used in future 8051 family

products to invoke new feature. In that case, the reset value of the new bit will be 0, and its active

value will be 1. The value read from a reserved bit is indeterminate.

Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.

DPS

Data Pointer Selection.

DPS

Operating Mode

DPTR0 Selected

DPTR1 Selected

GF3

This bit is a general purpose user flagb.

External Data Memory

AUXR1(A2H)

DPS

DPH(83H) DPL(82H)

DPTR0

DPTR1

T89C51RD2-3CWC-M Datasheet(PDF) 13 Page - ATMEL Corporation