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T89C51RD2-3CWC-M Datasheet(PDF) 27 Page - ATMEL Corporation |
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T89C51RD2-3CWC-M Datasheet(HTML) 27 Page - ATMEL Corporation |
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27 / 86 page ![]() 27 Rev. F - 15 February, 2001 T89C51RD2 Table 11. CCAPnH: PCA Modules Capture/Compare Registers High Table 12. CCAPnL: PCA Modules Capture/Compare Registers Low Table 13. CH: PCA Counter High Table 14. CL: PCA Counter Low 6.5.1. PCA Capture Mode To use one of the PCA modules in the capture mode either one or both of the CCAPM bits CAPN and CAPP for that module must be set. The external CEX input for the module (on port 1) is sampled for a transition. When a valid transition occurs the PCA hardware loads the value of the PCA counter registers (CH and CL) into the module's capture registers (CCAPnL and CCAPnH). If the CCFn bit for the module in the CCON SFR and the ECCFn bit in the CCAPMn SFR are set then an interrupt will be generated (Refer to Figure 9). CCAPnH Address n=0-4 CCAP0H=0FAH CCAP1H=0FBH CCAP2H=0FCH CCAP3H=0FDH CCAP4H=0FEH 7 6 5 4 3 2 1 0 Reset value 0 0 0 0 0 0 0 0 CCAPnL Address n=0-4 CCAP0L=0EAH CCAP1L=0EBH CCAP2L=0ECH CCAP3L=0EDH CCAP4L=0EEH 7 6 5 4 3 2 1 0 Reset value 0 0 0 0 0 0 0 0 CH Address 0F9H 7 6 5 4 3 2 1 0 Reset value 0 0 0 0 0 0 0 0 CL Address 0E9H 7 6 5 4 3 2 1 0 Reset value 0 0 0 0 0 0 0 0 |
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