AFE032 datasheet(40/77 Pages) TI1

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AFE032

SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013

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Table 15. REG_FLAG_CTL Register (Address = 01h)

DIG_ERR

IFLAG mask

TFLAG mask

Reserved

mask

R/W

LEGEND: R/W = read and write; R = read-only.

Bit 7

IFLAG mask

Software asserts this bit to prevent the current-limit interrupt from commanding the INT external pin. The current

limit event still asserts the IFLAG_INT bit on the REG_AFE_STATUS register.

0 = Do not mask

1 = Mask IFLAG_INT (default)

Bit 6

TFLAG mask

Software asserts this bit to prevent the overtemperature interrupt from commanding the INT external pin. The

overtemperature event still asserts the TFLAG_INT bit on the REG_AFE_STATUS register.

0 = Do not mask

1 = Mask TFLAG_INT (default)

Bit 5

DIG_ERR mask

Software asserts this bit to prevent the digital error status bits from commanding the INT external pin. Any digital

errors can still be read in the REG_DIG_ERROR register.

0 = Do not mask

1 = Mask digital errors (default)

Bits[4:0]

Reserved

These bits are reserved.

Default = 0.

Table 16. RESERVED Register (Address = 02h)

Reserved

LEGEND: R = read-only.

This register is reserved. Default = 7Fh

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