R5F110MF datasheet(55/153 Pages) RENESAS

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RL78/L1C

2. ELECTRICAL SPECIFICATIONS (A: TA = -40 to +85 °C)

R01DS0192EJ0200 Rev. 2.00

Page 55 of 149

Feb 21, 2014

Note 1.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.

Note 2.

When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

Caution

Select the TTL input buffer for the SIp pin and the N-ch open drain output (VDD tolerance) mode for the SOp pin

and SCKp pin by using port input mode register g (PIMg) and port output mode register g (POMg). For VIH and

VIL, see the DC characteristics with TTL input buffer selected.

Remark 1.

Rb[

ι]: Communication line (SCKp, SOp) pull-up resistance, Cb[F]: Communication line (SCKp, SOp) load capacitance,

Vb[V]: Communication line voltage

Remark 2.

p: CSI number (p = 00), m: Unit number (m = 0),

n: Channel number (n = 0), g: PIM and POM number (g = 2)

Remark 3.

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,

n: Channel number (mn = 00))

(7)

Communication at different potential (2.5 V) (CSI mode) (master mode, SCKp... internal clock output,

corresponding CSI00 only)

(TA = -40 to +85 °C, 2.7 V  VDD  3.6 V, VSS = 0 V)

Parameter

Symbol

Conditions

HS (high-speed main)

Mode

LS (low-speed main)

Mode

LV (low-voltage main)

Mode

Unit

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

SCKp cycle time

tKCY1

 fCLK/2 2.7V  VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



300

1150

SCKp high-level

width

tKH1

2.7 V

 VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



tKCY1/2 - 120

SCKp low-level

width

tKL1

2.7 V

 VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 1.4 k



tKCY1/2 - 10

tKCY1/2 - 50

SIp setup time

(to SCKp

↑) Note 1

tSIK1

2.7 V

 VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



121

479

SIp hold time

(from SCKp

↑) Note 1

tKSI1

2.7 V

 VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 1.4 k



Delay time from

SCKp

↓ to SOp

output Note 1

tKSO1

2.7 V

 VDD  3.6 V,

2.3 V

 Vb  2.7 V,

Cb = 20 pF, Rb = 1.4 k



130

SIp setup time

(to SCKp

↓) Note 2

tSIK1

2.7 V  VDD  3.6 V,

2.3 V  Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



110

SIp hold time

(from SCKp

↓) Note 2

tKSI1

2.7 V  VDD  3.6 V,

2.3 V  Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



Delay time from

SCKp

↑ to SOp

output Note 2

tKSO1

2.7 V  VDD  3.6 V,

2.3 V  Vb  2.7 V,

Cb = 20 pF, Rb = 2.7 k



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