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AT25DF641A Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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AT25DF641A Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 58 page  8793D–DFLASH–5/2013 Features Single 2.7V - 3.6V supply Serial Peripheral Interface (SPI) compatible Supports SPI Modes 0 and 3 Supports RapidS™ operation Supports Dual-Input Program and Dual-Output Read Very high operating frequencies 100MHz for RapidS 85MHz for SPI Clock-to-output time (tV) of 5ns maximum Flexible, optimized erase architecture for code + data storage applications Uniform 4KB, 32KB, and 64KB Block Erase Full Chip Erase Individual sector protection with Global Protect/Unprotect feature 128 Sectors of 64KB each Hardware controlled locking of protected sectors via WP pin Sector Lockdown Make any combination of 64KB sectors permanently read-only 128-byte One-Time Programmable (OTP) Security Register 64 bytes factory preprogrammed 64 bytes user programmable Flexible programming Byte/Page Program (1 to 256 bytes) Fast program and erase times 2.5ms typical Page Program (256 bytes) time 75ms typical 4KB Block Erase time 300ms typical 32KB Block Erase time 600ms typical 64KB Block Erase time Program and Erase Suspend/Resume Automatic checking and reporting of erase/program failures Software controlled reset JEDEC Standard Manufacturer and Device ID Read Methodology Low power dissipation 25mA Active Read current (typical at 20MHz) 5μA Deep Power-Down current (typical) Endurance: 100,000 program/erase cycles Data retention: 20 years Complies with full industrial temperature range Industry standard green (Pb/Halide-free/RoHS compliant) package options 8-lead SOIC (0.208” wide) 8-pad Ultra-thin DFN (5 x 6 x 0.6mm) AT25DF641A 64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual–I/O Support DATASHEET |
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