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OPA690IDBVT Datasheet(PDF) 15 Page - Texas Instruments |
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OPA690IDBVT Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 37 page ![]() 70 68 66 64 62 60 58 56 54 52 50 OutputPull-DownCurrent(mA) 0 1 2 3 4 5 6 7 8 9 10 V =2V ,10MHz O PP OPA690 402W 50W 402W 59W 1V PP 698W 698W V I +5V DIS 0.1 F m R S 30W I B R B 50pF 0.1 F m 2.5VDC ±1VAC ADCInput Power-supplydecouplingnotshown. OPA690 www.ti.com SBOS223F – DECEMBER 2001 – REVISED FEBRUARY 2010 Again, an additional resistor (50 Ω in this case) is The OPA690 in the circuit of Figure 39 provides included directly in series with the noninverting input. > 200MHz bandwidth for a 2VPP output swing. This minimum recommended value provides part of Minimal 3rd-harmonic distortion or two-tone, the dc source resistance matching for the 3rd-order intermodulation distortion will be observed noninverting input bias current. It is also used to form due to the very low crossover distortion in the a simple parasitic pole to roll off the frequency OPA690 output stage. The limit of output response at very high frequencies ( > 500MHz) using Spurious-Free Dynamic Range (SFDR) will be set by the input parasitic capacitance to form a bandlimiting the 2nd-harmonic distortion. Without RB, the circuit of pole. The gain resistor (RG) is ac-coupled, giving the Figure 39 measured at 10MHz shows an SFDR of circuit a dc gain of +1, which puts the input dc bias 57dBc. This may be improved by pulling additional dc voltage (2.5V) at the output as well. The output bias current (IB) out of the output stage through the voltage can swing to within 1V of either supply pin optional RB resistor to ground (the output midpoint is while delivering > 100mA output current. A at 2.5V for Figure 39). Adjusting IB gives the demanding 100 Ω load to a midpoint bias is used in improvement in SFDR shown in Figure 38. SFDR this characterization circuit. The new output stage improvement is achieved for IB values up to 5mA, circuit used in the OPA690 can deliver large bipolar with worse performance for higher values. output currents into this midpoint load with minimal crossover distortion, as shown in the +5V supply, 3rd-harmonic distortion plots. SINGLE-SUPPLY ADC INTERFACE Most modern, high performance ADCs (such as the TI ADS8xx and ADS9xx series) operate on a single +5V (or lower) power supply. It has been a considerable challenge for single-supply op amps to deliver a low distortion input signal at the ADC input for signal frequencies exceeding 5MHz. The high slew rate, exceptional output swing, and high linearity of the OPA690 make it an ideal single-supply ADC driver. The circuit on the front page shows one possible (inverting) interface. Figure 39 shows the test circuit of Figure 37 modified for a capacitive (ADC) load and with an optional output pull-down Figure 38. SFDR vs IB resistor (RB). Figure 39. SFDR versus IB Test Circuit Copyright © 2001–2010, Texas Instruments Incorporated 15 Product Folder Link(s): OPA690 |
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