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HM17CM256 Datasheet(PDF) 20 Page - Hynix Semiconductor |
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HM17CM256 Datasheet(HTML) 20 Page - Hynix Semiconductor |
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20 / 111 page ![]() HM17CM256 - 20 - (7) Window address assign of display RAM This IC can be accessed to display RAM by window area designation in addition to access to display RAM designated by X and Y address. Through address space of all display address, specific area of RAM can be accessed by designated two points. The start point of two point addresses is assigned by normal X address and Y address register and the end point of them is done by X end address and Y end address register value. Designated inner addresses depend on WLS bit. Read modified write action can be taken by AIM=“1”. In case of using window area accessing mode, you must set start point X address, Y address in sequence and end point X address, Y address in sequence after executing Win command (WIN=“1”, auto increase mode AXI=“1”, AYI=“1”) and then access to Display RAM. And set start point and end point not to be designated to access the outside of available address area. Address set value should be taken to set AX ≤ EX ( end point of X address ) and AY≤EY ( end point of Y address ). X direction (X, Y) address designation end address designation Window display area (X, Y) All display RAM area (8) display RAM data and LCD Display RAM data related with one dot of LCD is dependent on REV register. Normal display and reverse display by REV register are set up as follows. TABLE REV Display RAM data 0 L normal 1 0 H reverse 1 (9) Segment display output order/reverse set up The order of display outputs, SEGA0, SEGB0, SEGC0 to SEGA127, SEGB127, and can be reversed by reversing access to display RAM from MPU by using REF register, lessen the limitation in placing IC when assembling an LCD panel module. |
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