HM17CM256 datasheet(74/111 Pages) HYNIX

74 / 111 page

HM17CM256

- 74 -

BT command : inversion timing selection at line inversion display

BT=”0”: Negative tone display in specified area

BT=”1”: The image of specified area is blinked by every 32 frame.

Display example (BT=”1”)

And be cautious that LREV and BT commands have no influence on dummy segment driver circuit.

And the image selected by COMI0, COMI1 is excluded.

HYUNDAI

LCD DRIVER

Low Power and

Low Voltage

HYUNDAI

LCD DRIVER

Low Power and

Low Voltage

Line inversion display example (LREV=”1”,BT=”1”)

(34-30) Dummy segment driver address selection ( Refer to dummy segment drive related description. )

RE2

RE1

RE0

DMY

( reset :{DMY}=0H, read address :8H) * : “Don’t care”

When data is to be written to dummy segment driver, this register is active (DMY=”1”).

DMY=”0”: normal display RAM access

DMY=”1”: display data access to dummy segment driver

Normal segment drivers acquire display data from display RAM, but dummy segment drivers acquire

display data from corresponding register not from display RAM.

The capacity of register is 4 bytes.

That is correspond to SEGSA0~SEGSA3

SEGSB0~SEGSB3

SEGSC0~SEGSC3 output.

When accessing with DMY = “1”, address setting is valid by only X address.

There is 4 byte capacity,

and so 00H, 01H, 02H, 03H is valid at 8 bits mode and 00H, 01H is valid at 16 bits mode.

There is no

Changes per

every 32 frame.

line inversioin start address

line inversioin end address

Changes per

every 32 frame.

HM17CM256 Datasheet(PDF) 74 Page - Hynix Semiconductor

HM17CM256 Datasheet(HTML) 74 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL