HM17CM256 datasheet(97/111 Pages) HYNIX

97 / 111 page

HM17CM256

- 97 -

s AC CHARACTERISTICS

•

SYSTEM BUS READ / WRITE TIMING (80 series CPU interface)

(write timing)

(VDD=2.7

∼3.3V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH8

tAS8

TBD

System cycle timing

Write ”L” pulse width

Write ”H” pulse width

tCYC8

tWRLW8

tWRHW8

TBD

Data setup timing

Data hold timing

tDS8

tDH8

TBD

∼ D

(VDD=2.4

∼2.7V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH8

tAS8

TBD

System cycle timing

Write ”L” pulse width

Write ”H” pulse width

tCYC8

tWRLW8

tWRHW8

TBD

Data setup timing

Data hold timing

tDS8

tDH8

TBD

∼ D

(VDD=1.7

∼2.4V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH8

tAS8

TBD

System cycle timing

Write ”L” pulse width

Write ”H” pulse width

tCYC8

tWRLW8

tWRHW8

TBD

Data setup timing

Data hold timing

tDS8

tDH8

TBD

∼ D

notice)

All timing reference is 20% and 80% of VDD and 80%.

tCYC8

tAS8

∼ D

tAH8

tWRLW8

tWRHW8

tDS8

tDH8

HM17CM256 Datasheet(PDF) 97 Page - Hynix Semiconductor

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