HMS91C8032 datasheet(53/157 Pages) HYNIX

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HMS91C8032/97C8032

NOV., 2001 Ver 1.02

* fCPU : CPU clock

* The fCPU is shown in Figure 4-2

Baud Rates

The baud rate in Mode 0 is fixed:

The baud rate in Mode 2 depends on the value of bit SMOD = 0

(which is the value on reset), the baud rate is 1/32 the CPU clock

frequency. If SMOD = 1, the baud rate is 1/16 the CPU clock fre-

quency.

In the HMS9XC8032, the baud rates in Modes 1 and 3 are deter-

mined by the Timer 1 overflow rate.

Using Timer 1 to Generate Baud Rates

When Timer 1 is used as the baud rate generator, the baud rates

in Modes 1 and 3 are determined by the Timer 1 overflow rate and

the value of SMOD as follows

The Timer 1 interrupt should be disabled in this application. The

Timer itself can be configured for either "timer" or "counter" op-

eration, and in any of its 3 running modes. In the most typical ap-

plications, it is configured for "timer" operation, in the

auto-reload mode (high nibble of TMOD = 0010B). In that case

the baud rate is given by the formula:

One can achieve very low baud rates with Timer 1 by leaving the

Timer 1 interrupt enabled, and configuring the Timer to run as a

16-bit timer (high nibble of TMOD = 0001B), and using the Tim-

er 1 interrupt to do a 16-bit software reload. Figure 12 lists vari-

ous commonly used baud rates and how they can be obtained

from Timer 1. be obtained from Timer 1.

Using Timer/Counter 2 to Generate Baud Rates

In the HMS9XC8032, Timer 2 selected as the baud rate generator

by setting TCLK and/or RCLK in T2CON (see Figure B-14 Tim-

er/Counter 2 Control Register (T2CON)). Note that the baud rate

for transmit and receive can be simultaneously different. Setting

RCLK and/or TCLK puts Timer into its baud rate generator

mode.

The baud rate generator mode is similar to the auto-reload mode,

in that a roll over in TH2 causes the Timer 2 registers to be reload-

ed with the 16-bit value in registers RCAL2H and RCAP2L,

which are preset by software.

Now, the baud rates in Modes 1 and 3 are determined at Timer 2’s

overflow rate as follows:

The timer can be configured for either “timer” or “counter” oper-

Figure 4-15 Serial Port Control Register (SCON)

SM0

Mode

(MSB)

(LSB)

SM0

SM1

SM2

REN

TB8

RB8

The 9th data bit that will be transmitted in modes

2 and 3. Set or clear by software as desired.

In modes 2 and 3, is the 9th data bit that was

received. In mode 1, If SM2 = 0, RB8 is the stop

bit that was received. In mode 0, RB8 is not used.

Transmit interrupt flag. Set by hardware at the end

of the 8th bit time in mode 0, or at the beginning of

the stop bit in the other modes, in any serial

transmission. Must be cleared by software.

Where SM0, SM1 specify the serial port mode, as follows :

SM1

Description

Baud Rate

Shift Reg ister

8-Bit UART

variable

9-Bit UART

variable

enables the multiprocessor communication feature in

mode2 and 3. In mode 2 or 3, if SM2 is set to 1, then RI

will not be activated if the received 9th data bit (RB8) is 0.

In mode 1, if SM2= 1, then RI will not be activated if a valid

stop bit was not received. In mode 0, SM2 should be 0.

SM2

REN

enables serial reception. Set by software to enable

reception. Clear by software to disable reception.

TB8

Receive interrupt flag. Set by hardware at the end

of the 8th bit time in mode 0, or halfway through the

stop bit in the other modes, in any serial reception

(except see SM2). Must be cleared by software.

RB8

8-Bit UART

OSC /12

OSC /64

OSC /32

fCPU/6

fCPU/32

fCPU/16

Mode 0 Baud Rate

CPU 6

⁄

Mode 2 Baud Rate

SMOD

-----------------

CPU

Mode 1,3 Baud Rate

2SMOD

----------------

Timer 1 Overflow Rate

()

Mode 1,3 Baud Rate

2SMOD

----------------

CP U

256

TH1

()

–

[]

------------------------------------------------

Mode 1,3 Baud Rate

Timer 2 Overflow Rate

-------------------------------------------------------

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