HMS91C8032 datasheet(65/157 Pages) HYNIX

65 / 157 page

HMS91C8032/97C8032

NOV., 2001 Ver 1.02

Operation of Serial buffer

The operation is shown below.

Data shift operation of Serial buffer

Precautions in Data Setting and Data reading

Data writing into the serial buffer is performed by MOV instruc-

tion. Reading of data is performed by MOV instruction. Data set-

ting and data reading must be performed while the wait status

exists. During the wait cancel, data setting and data carrying may

fail depending on the status of the shift clock pin.

Wait Block

The wait block controls pause (wait) and cancel of communica-

tion of the SIO1 and SIO2. This control is performed by the

SIO2TS flag. Wait Operation and Precautions section shows the

wait operation and precautions.

Wait Operation and Precautions

The wait state means a state when the clock generation block, se-

rial buffer, etc. stop their operation, and the serial communication

is suspended. When the wait state if canceled, serial communica-

tion operation is started. Wait state is canceled by writing 1 into

SIO2TS flag. When 1 is written into the SIO2TS flag, the internal

clock is output to the shift clock output pin (master operation

mode), and the serial buffer and clock counter start operation.

When the clock counter is 8 and shift clock rises, the wait cancel

state turns into the wait state. In this case, the SIO2TS flag is reset

(0) automatically. The operation status of serial communication

can be known by detecting the content of SIO2 TS flag while the

wait is canceled. After starting the serial communication by writ-

ing 1 to SIO2TS flag, the data can be read or set by detecting the

Figure 4-23 SIO1 and SIO2 Timing Diragram

SCK

Clock

Counter

Serial I/O system

Serial input operation

Serial output operation

The status of SI is entered by shifting from LSB at eth rising

edge of shift clock pin wave form. If the SI pin is set as input

port, the content of output latch is entered.

The data is output to SO pin by shifting from MSB at the fall-

ing edge of shift clock pin waveform. If the SO pin is set as

input port, if if SIO2HIZ flag is 0, then no serial output is pro-

vide.

Table 4-26

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