70353C datasheet(68/76 Pages) MICROCHIP

68 / 76 page

dsPIC33E/PIC24E Family Reference Manual

DS70353C-page 21-68

21.12

ECAN LOW-POWER MODES

The ECAN module can respond to the CPU PWRSAV instruction.

21.12.1 Sleep Mode

A CPU PWRSAV,1 instruction stops the crystal oscillator and shuts down all system clocks. The

user application must ensure that the module is not active when the CPU goes into Sleep mode.

To protect the CAN bus system from fatal consequences due to violations of the above rule, the

module drives the CiTX pin into the recessive state while in Sleep mode. The recommended

procedure is to bring the module into Disable mode before the CPU PWRSAV,1 instruction is

executed.

21.12.2 Idle Mode

A CPU PWRSAV,0 instruction signals the module to optionally shut down clocks. The module

powers down, if the Stop in Idle Mode bit (CSIDL) in the ECAN Control Register 1

(CiCTRL1<13>) is ‘1’. The user application must ensure that the module is not active when the

CPU goes into Idle mode. To protect the CAN bus system from fatal consequences due to

violations of the above rule, the module drives the CiTX pin into the recessive state while in Sleep

mode. The recommended procedure is to bring the module into Disable mode before the CPU

PWRSAV,0 instruction is executed.

21.12.3 Wake-up Functions

The module monitors the RX line for activity while the device is in Sleep mode. If the WAKIE bit

is set, the module generates an interrupt if bus activity is detected. Due to the delays in starting

up the oscillator and CPU, the message activity that caused the wake-up is lost.

After the CPU wakes up from Sleep, the CPU executes the CAN event ISR (if interrupts are

enabled); however, the CAN module itself would still be disabled. The CAN bus wake-up feature

only wakes when the device is in Sleep mode.

The module features a low-pass filter on the CiRX input line, which should be enabled when the

module is in CPU Sleep mode. This filter protects the module from wake-up due to short glitches

on the CAN bus. The filter is enabled by setting the WAKFIL bit (CiCFG2<14>).

21.13

ECAN TIME STAMPING USING INPUT CAPTURE

The ECAN module generates a signal that can be sent to a timer capture input whenever a valid

frame has been accepted. This is useful for time-stamping and network synchronization.

Because the CAN Specification defines a frame to be valid if no errors occurred before the EOF

field has been transmitted successfully, the timer signal will be generated right after the EOF. A

pulse of one bit time is generated. Time-stamping is enabled by the CAN Message Receive Timer

Capture Event Enable (CANCAP) control bit (CiCTRL1<3>). The IC2 capture input is used for

time-stamping.

Note:

The ECAN wake-up filter must be enabled for the module to wake-up from Sleep

mode on detecting CAN bus activity.

Note:

If the CAN capture is enabled, the IC2 pin becomes unusable as a general input

capture pin. In this mode, the IC2 channel derives its input signal from the C1RX or

C2RX pin instead of the IC2 pin.

70353C Datasheet(PDF) 68 Page - Microchip Technology

70353C Datasheet(HTML) 68 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

Datasheet Download

Link URL