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AN4092 Datasheet(PDF) 12 Page - STMicroelectronics |
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AN4092 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 38 page ![]() Power Management Controller (PMC) AN4092 12/38 Doc ID 023080 Rev 2 Figure 3. Inrush current example - without collector resistor Figure 4. Inrush current example - with collector resistor 1.1.7 Layout recommendations The inductance of the heatsink rail of the ballast transistor and the MCU lead to inductance in the system. The placement of the transistor also affects the inductance, due to the lengths of the 1.2 V traces (from the emitter to the VDD pins) and of the VRCCTL signal: those inductances eventually reduce the phase margin jeopardizing the regulator stability. It is mandatory to keep the parasitic inductance between the emitter and VDD pins lower than 20nH. |
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