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AN2847 Datasheet(PDF) 8 Page - STMicroelectronics

Part # AN2847
Description  This document provides application information for the low-voltage 3-axis digital output
PDF  31 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2847 Datasheet(HTML) 8 Page - STMicroelectronics

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Start-up sequence
AN2847
8/31
Doc ID 15136 Rev 2
2.1
Reading acceleration data
2.1.1
Using the status register
The device features a STATUS_REG register which should be polled to check when a new
set of data is available. The reading procedure is the following:
The check performed at step 3 determines whether the reading rate is adequate compared
to the data production rate. In cases where one or more acceleration samples have been
overwritten by new data due to an excessively slow reading rate, the ZYXOR bit of the
STATUS_REG register is set to 1.
The overrun bits are automatically cleared when all the data present inside the device have
been read and new data have not been produced in the meantime.
2.1.2
Using the data-ready signal
The device may be configured to have one HW signal to determine when a new set of
measurement data is available for reading. This signal is represented by the XYZDA bit of
the STATUS_REG register. The signal can be driven to the INT1 or INT2 pins and its polarity
set to active-low or active-high through the CTRL_REG3 register. The interrupt is reset
when the higher part of the data of all the enabled channels has been read.
2.1.3
Using the block data update feature
If the reading of the acceleration data is particularly slow and cannot be (or does not need to
be) synchronized with either the XYZDA bit within the STATUS_REG or with the RDY signal,
it is strongly recommended to set the BDU (block data update) bit in CTRL_REG4 to 1.
This feature prevents the need to read the values (most significant and least significant parts
of the acceleration data) related to different samples. In particular, when the BDU is
activated, the data registers related to each channel always contain the most recent
acceleration data produced by the device. But if the reading of a given pair (i.e. OUTX_H
and OUTX_L, OUTY_H and OUTY_L, OUTZ_H and OUTZ_L) is initiated, the refresh for
that pair is blocked until both the MSB and LSB parts of the data are read.
1
read STATUS_REG
2
if STATUS_REG(3) = 0 then goto 1
3
if STATUS_REG(7) = 1 then some data have been overwritten
4
read OUTX_L
5
read OUTX_H
6
read OUTY_L
7
read OUTY_H
8
read OUTZ_L
9
read OUTZ_H
10
data processing
11
goto 1



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