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AN2847 Datasheet(PDF) 14 Page - STMicroelectronics

Part # AN2847
Description  This document provides application information for the low-voltage 3-axis digital output
PDF  31 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2847 Datasheet(HTML) 14 Page - STMicroelectronics

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Operating modes
AN2847
14/31
Doc ID 15136 Rev 2
Table 9 and Table 10 show the typical power consumption values for the different operating
modes.
Note:
Higher data rates correspond to lower device resolution.
3.1
Normal mode
In Normal mode, data are generated at the data rate (ODR) selected through the DR bits
and for the axis enabled through the Zen, Yen and Xen bits of the CTRL_REG1 register.
Data generated for a disabled axis is 00h.
Data interrupt generation is active and configured through the INT1_CFG and INT2_CFG
registers.
3.2
Power down mode
When the device is in Power Down mode, almost all internal blocks of the device are
switched off to minimize power consumption. Digital interfaces (I2C and SPI) are still active
to allow communication with the device. The content of the configuration register is
preserved and output data registers are not updated, thus keeping in memory the last data
sampled before going to Power Down mode.
Typical turn-on time to return to Normal mode is 1 ms + 1/ODR.
Table 8.
CTRL_REG5 - sleep to wake configuration
TurnOn1
TurnOn0
Sleep to wake status
0
0
Sleep to wake function disabled
01
An interrupt event has occurred and the system is generating data at
ODR
1
0
Not allowed
1
1
Sleep to wake function enabled
Table 9.
Power consumption - normal mode (µA)
ODR
50 Hz
100 Hz
400 Hz
1000 Hz
Power consumption
250
255
290
370
Table 10.
Power consumption - low power mode (µA)
ODR\ODRLP
0.5 Hz
1 Hz
2 Hz
5 Hz
10 Hz
50 Hz
10
20
30
60
99
100 Hz
10
15
20
40
80
400 Hz
10
15
20
40
80
1000 Hz
5
10
15
30
60



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