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AN3339 Datasheet(PDF) 19 Page - STMicroelectronics |
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AN3339 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 44 page ![]() AN3339 Functional check Doc ID 18449 Rev 2 19/44 Figure 29 and 30 show the PFC control signal; in particular the VFF signal which is the second input to the multiplier for 1/V2 function. The voltage at this pin, a DC level equal to the peak voltage on the MULT pin (#3), compensates the control loop gain line-dependence. In Figure 30, it can be observed that a negative-going edge on the ZCD pin triggers the MOSFET turn-on. Figure 27. PFC Vds and inductor current at 230 Vac - 50 Hz, full load Figure 28. PFC Vds and inductor current at 230 Vac, full load - detail CH3: CS (pin #4) CH1: Q1 drain voltage CH2: MULT (pin #3) CH4: L1 inductor current CH3: CS (pin #4) CH1: Q1 drain voltage CH2: MULT (pin #3) CH4: L1 inductor current Figure 29. L6564 signals (1) at 115 Vac - 60 Hz, full load Figure 30. L6564 signals (2) at 115 Vac - 60 Hz, full load CH3: MULT (pin #3) CH1: COMP (pin #9) CH2: VFF (pin #7) CH4: CS (pin #4) CH3: MULT (pin #3) CH1: GD (pin #9) CH2: ZCD (pin #7) CH4: CS (pin #4) |
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