MAX5259 datasheet(17/20 Pages) MAXIM

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Power Sequencing

The voltage applied to REF should not exceed VDD at

any time. If proper power sequencing is not possible,

connect an external Schottky diode between REF and

VDD to ensure compliance with the absolute maximum

ratings. Do not apply signals to the digital inputs before

the device is fully powered-up.

Power-Supply Bypassing and

Ground Management

Bypass VDD with a 0.1µF capacitor, located as close to

VDD and GND as possible. Careful PC board layout

minimizes crosstalk among DAC outputs and digital

inputs. Figure 10 shows suggested circuit board layout

to minimize crosstalk.

Unipolar-Output, Two-Quadrant

Multiplication

In unipolar operation, the output voltages and the refer-

ence input are the same polarity. Figure 11 shows the

MAX5258/MAX5259 unipolar configuration, and Table 2

shows the unipolar code.

+3V/+5V, Low-Power, 8-Bit Octal DAC

with Rail-to-Rail Output Buffers

______________________________________________________________________________________

REF

R15

R16

R255

DAC A

LSB DECODER

Figure 8. DAC Simplified Circuit Diagram

OUTC

OUTD

DOUT

DIN

SYSTEM GND

OUTB

OUTA

GND

VDD

REF

LDAC

Figure 10. Suggested PC Board Layout for Minimizing

Crosstalk (Bottom View)

DAC CODE

NEGATIVE

OFFSET

OUTPUT

VOLTAGE

Figure 9. Effect of Negative Offset (Single Supply)

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