W97AH6KB datasheet(5/127 Pages) WINBOND

5 / 127 page

W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 5 -

8.7.2.6

Tangent Line for Setup Time tIS for CA and CS_n with Respect to Clock ....................................................... 117

8.7.2.7

Tangent Line for Hold Time tIH for CA and CS_n with Respect to Clock ......................................................... 118

8.7.3

Data Setup, Hold and Slew Rate Derating ................................................................................................................. 119

8.7.3.1

Data Setup and Hold Base-Values.................................................................................................................. 119

8.7.3.2

Derating Values LPDDR2 tDS/tDH - AC/DC Based AC220 ............................................................................. 120

8.7.3.3

Required Time tVAC above VIH(ac) {below VIL(ac)} for Valid Transition......................................................... 120

8.7.3.4

Nominal Slew Rate and tVAC for Setup Time tDS for DQ with Respect to Strobe ........................................... 121

8.7.3.5

Nominal Slew Rate for Hold time tDH for DQ with Respect to Strobe .............................................................. 122

8.7.3.6

Tangent Line for Setup Time tDS for DQ with Respect to Strobe .................................................................... 123

8.7.3.7

Tangent Line for Hold Time tDH for DQ with Respect to Strobe ...................................................................... 124

PACKAGE DIMENSIONS .......................................................................................................................................... 125

10.

REVISION HISTORY ................................................................................................................................................. 127

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