W97AH6KB datasheet(57/127 Pages) WINBOND

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W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 57 -

7.4.20.2 Read to MRR Timing Example: RL = 3, tMRR = 2

CMD not allowed

CA0-9

[Cmd]

DQ[0-7]

DQ[8-max]

BL / 2

tMRR = 2

RL = 3

BA M

Col Addr A

Reg B

Read

MRR

DOUT A0

DOUT B

UNDEF

Col Addr A

DOUT A1

DOUT A2

DOUT A3

DOUT A0

DOUT A1

DOUT A2

DOUT A3

CK_t / CK_c

DQS_c

DQS_t

Notes:

1. The minimum number of clocks from the burst read command to the Mode Register Read command is BL/2.

2. The Mode Register Read Command period is tMRR. No command (other than Nop) is allowed during this period.

7.4.20.3 Burst Write Followed by MRR: RL = 3, WL = 1, BL = 4

CA0-9

[Cmd]

BA N

Col Addr A

Reg B

Write

MRR

Col Addr A

DIN A0

DIN A1

DIN A2

DIN A3

CMD not allowed

WL = 1

tWTR

RL = 3

tMRR = 2

CK_t / CK_c

DQS_c

DQS_t

Notes:

1. The minimum number of clock cycles from the burst write command to the Mode Register Read command is [WL + 1 + BL/2 + RU( tWTR/tCK)].

2. The Mode Register Read Command period is tMRR. No command (other than Nop) is allowed during this period.

W97AH6KB Datasheet(PDF) 57 Page - Winbond

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