TAS5548DCAR datasheet(31/116 Pages) TI1

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122

Overhead / Guard

Bits

16 -Bit

Audio

18-Bit

Audio

20-Bit

Audio

24-Bit

Audio

Precision / Noise

Bits

TAS5548

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SLES270A – NOVEMBER 2012 – REVISED APRIL 2015

The firmware is executed in a 32-bit, signed, fixed-point arithmetic machine. The most significant bit of the 32-bit

data path is a sign bit, and the 31 lower bits are data bits. Mixer gain operations are implemented by multiplying

a 32-bit, signed data value by a 28-bit, signed gain coefficient (known as 5.23 in the rest of this document. See

for more details). The 60-bit, signed output product is then truncated to a signed, 32-bit number. Level offset

operations are implemented by adding a 32-bit, signed offset coefficient to a 32-bit, signed data value.

In most cases, if the addition results in overflowing the 32-bit, signed number format, saturation logic is used.

This means that if the summation results in a positive number that is greater than 0x7FFF FFFF FF (the spaces

are used to ease the reading of the hexadecimal number), the number is set to 0x7FFF FFFF FF. If the

summation results in a negative number that is less than 0x8000 0000 00, the number is set to 0x8000 0000 00.

This allows the system to clip in a similar way to an analog circuit, rather than "wrapping around" to a polar

opposite output.

7.4.10.1 Digital Audio Processor (DAP) Arithmetic Unit

The digital audio processor (DAP) arithmetic unit is a fixed-point computational engine consisting of an arithmetic

unit and data and coefficient memory blocks.

The DAP arithmetic unit is used to implement all firmware functions - loudness compensation, bass and treble

processing, dynamic range control, channel filtering, input and output mixing.

Figure 26 shows the data word structure of the DAP arithmetic unit. Four bits of overhead or guard bits are

provided at the upper end of the 32-bit DAP word, and 4 bits of computational precision or noise bits are

provided at the lower end of the 32-bit word. The incoming digital audio words are all positioned with the most

significant bit abutting the 4-bit overhead/guard boundary. The sign bit in bit 31 indicates that all incoming audio

samples are treated as signed data samples.

Figure 26. DAP Arithmetic Unit Data Word Structure

The arithmetic engine is a 32-bit (9.23 format) processor consisting of a general-purpose 60-bit arithmetic logic

unit and function-specific arithmetic blocks. Multiply operations (excluding the function-specific arithmetic blocks)

always involve 32-bit (9.23) DAP words and 28-bit (5.23) coefficients (usually I2C programmable coefficients). If

a group of products are to be added together, the 60-bit product of each multiplication is applied to a 60-bit

adder, where a DSP-like multiply-accumulate (MAC) operation takes place. Biquad filter computations use the

MAC operation to maintain precision in the intermediate computational stages.

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