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UT700 Datasheet(PDF) 31 Page - Aeroflex Circuit Technology

Part # UT700
Description  UT700 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor
PDF  46 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

UT700 Datasheet(HTML) 31 Page - Aeroflex Circuit Technology

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31
36-00-00-000
Ver. 1.3.1
Aeroflex Microelectronics Solutions - HiRel
4.3 Input Timing Characteristics for Memory Interface
(VDD = 3.3V + 0.3V; VDDC = 1.2V + 0.1V; TC = -55
oC to 105oC)
Notes:
1. CB[7] is not tested in the case of BCH EDAC.
2. Supplied as a design limit. Neither guaranteed nor tested.
Figure 6. Memory Interface Input Timing Diagram
Symbol
Description
Min
Max
Units
t5a1
Setup time to SDCLK
↑
(DATA[31:0] and CB[15:0])
1--
ns
t5b
Setup time to SDCLK
↑
(BEXC, and synchronous BRDY)
2--
ns
t6a1
Hold time from SDCLK
↑
(DATA[31:0] and CB[15:0])
1.5
--
ns
t6b
Hold time from SDCLK
↑
(Synchronous BRDY)
0--
ns
t72
Asynchronous BRDY pulse width
1.5
--
tCLK
t6b
t5b
t6a
t5a
t7
SDCLK
DATA[31:0] and CB[15:0]
BEXC and Synchronous BRDY
Asynchronous BRDY



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