33

36-00-00-000

Ver. 1.3.1

Aeroflex Microelectronics Solutions - HiRel

4.5 Timing Characteristics SpaceWire Interface

Notes:

1. The SPW_CLK frequency must be less than or equal to 10x the SYSCLK frequency. For example, if SPW_CLK is running at 200MHz, the SYSCLK frequency

must be greater than or equal to 20MHz.

2. Functionally tested.

3. Applies to both high pulse and low pulse.

4. A unit interval (UI) is defined as the nominal, or ideal, bit width.

5. Guaranteed by design.

6. The SPW_CLK period must be less than or equal to the minimum receive data/strobe bit width.

Figure 8. SpaceWire Transmit Timing Diagram

Figure 9. SpaceWire Receive Timing Diagram

Symbol

Description

Min

Max

Units

SPW_CLK period

5

--

ns

Transmit data and strobe bit width variation

(SPW_TXD[3:0] and SPW_TXS[3:0])

UI-600

UI+600

ps

Receive data and strobe bit width

(SPW_RXD[3:0] and SPW_RXS[3:0])

5--

ns

Receive data and strobe edge separation

(SPW_RXD[3:0] and SPW_RXS[3:0])

1/2*t11 + 0.5

--

ns

t14

t14

t11

SPW_CLK

SPW_TXD

SPW_TXS

t15

t16

t16

t15

SPW_RXD

SPW_RXS