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UPD720122 Datasheet(PDF) 10 Page - NEC |
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UPD720122 Datasheet(HTML) 10 Page - NEC |
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10 / 82 page ![]() Data Sheet S16685EJ2V0DS 10 µPD720122 (2/2) Pin Name I/O Buffer Type Active Level Function RSDM O USB full speed D- O USB’s full speed D − signal M(1:0) I 5 V tolerant Input Function mode setting VBUS I 5 V tolerant Input Note VBUS monitoring AVDD, PVDD 3.3 VDD for Analog circuit VDD 3.3 VDD AVSS, PVSS VSS for Analog circuit VSS, GND VSS NC Not connect Reserved Not used Note VBUS pin may be used to monitor for VBUS line even if VDD, AVDD, and PVDD are shut off. System must ensure that the input voltage level for VBUS pin is less than 3.0 V due to the absolute maximum rating is not exceeded. Remark “5 V tolerant“ means that the buffer is 3.3 V buffer with 5 V tolerant circuit. The operation mode of the BIU can be set by external pins, as shown below. Fix external pins (M1 and M0) when using them. Pin M1 M0 BIU Operation Mode Outline 0 0 16-bit mode (Function 1) A 16-bit CPU bus and an external local bus dedicated to data transfer for bulk IN/OUT can be used in this mode. The internal register length is 16 bits. 0 1 8-bit mode (Function 2) Multiplexed bus mode of 8-bit address bus and 8-bit data bus. The register length is 8 bits only in this mode (registers can only be accessed in byte units). Therefore, the address space in this mode differs from that in the other modes. The active levels of some external local bus control pins can be changed by the Active pin. 1 0 16-bit mix mode (Function 3) Multiplexed bus mode of 8-bit address bus and 16-bit data bus. The internal register length is 16 bits. The active levels of some external local bus control pins can be changed by the Active pin. 1 1 Setting prohibited (Function 4) Setting prohibited |
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