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EMC2103 Datasheet(PDF) 54 Page - Microchip Technology |
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EMC2103 Datasheet(HTML) 54 Page - Microchip Technology |
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54 / 85 page  RPM-Based Fan Controller with Hardware Thermal Shutdown Datasheet DS0005250A-page 54 2013 Microchip Technology Inc. Bit 1- FAN_SPIN - This bit is asserted ‘1’ if the Spin up Routine for the Fan cannot detect a valid tachometer reading within its maximum time window. This bit can be masked from asserting the ALERT pin. Bit 0 - FAN_STALL - This bit is asserted ‘1’ if the tachometer measurement on the Fan detects a stalled fan. This bit can be masked from asserting the ALERT pin. 6.15 Interrupt Enable Register The Interrupt Enable Register controls the masking for each temperature channel. When a channel is masked, it will not cause the ALERT pin to be asserted when an error condition is detected. Bit 3 - EXT3_INT_EN (EMC2103-2 and EMC2103-4 only) - Allows the External Diode 3 to assert the ALERT pin. ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External Diode 3 channel. ‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 3 channel. Bit 2 - EXT2_INT_EN (EMC2103-2 and EMC2103-4 only) - Allows the External Diode 2 to assert the ALERT pin. ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External Diode 2 channel. ‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 2 channel. Bit 1 - EXT1_INT_EN - Allows the External Diode 1 to assert the ALERT pin. ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External Diode 1 channel. ‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 1 channel. Bit 0 - INT_INT_EN - Allows the Internal Diode to assert the ALERT pin. ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with the Internal Diode. ‘1’ - The ALERT pin will be asserted for an error condition associated with the Internal Diode. 6.16 Fan Interrupt Enable Register Table 6.22 Interrupt Enable Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 28 R/W Interrupt Enable -- - - EXT3_I NT_EN EXT2_I NT_EN EXT1_I NT_EN INT_IN T_EN 00h Table 6.23 Fan Interrupt Enable Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 29 R/W Fan Interrupt Enable -- - - - - SPIN_ INT_EN STALL_ INT_EN 00h |
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