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EMC2103 Datasheet(PDF) 64 Page - Microchip Technology |
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EMC2103 Datasheet(HTML) 64 Page - Microchip Technology |
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64 / 85 page  RPM-Based Fan Controller with Hardware Thermal Shutdown Datasheet DS0005250A-page 64 2013 Microchip Technology Inc. See Equation [4] for translating the count to an RPM. If the TACH Reading Register value exceeds the Valid TACH Count Register (indicating that the Fan RPM is below the threshold set by this count), then a stalled fan is detected. In this condition, the algorithm will automatically begin its Spin Up Routine. APPLICATION NOTE: The automatic invoking of the Spin Up Routine only applies if the Fan Speed Control Algorithm is used. If the FSC is disabled, then the device will only invoke the Spin Up Routine when the PWM setting changes from 00h. If a TACH Target setting is set above the Valid TACH Count setting, then that setting will be ignored and the algorithm will use the current fan drive setting. The Valid TACH Count Register is software locked. 6.29 Fan Drive Fail Band Registers The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is enabled, the actual measured fan speed is compared against the target fan speed. This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0] bits then the DRIVE_FAIL status bit will be set and an interrupt generated. 6.30 TACH Target Register The TACH Target Register holds the target tachometer value that is maintained by the RPM based Fan Speed Control Algorithm. The value in the TACH Target Register will always reflect the current TACH Target value. If the Look Up Table is active and configured to operate in RPM Mode, then this register will be read only. Writing to this register will have no affect and the data will not be stored. Table 6.46 Fan Drive Fail Band Registers ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 4Ah R/W Fan Drive Fail Band Low Byte 16 8421 - - - 00h 4Bh R/W Fan Drive Fail Band High Byte 4096 2048 1024 512 256 128 64 32 00h Table 6.47 TACH Target Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 4Ch R/W Fan TACH Target Low Byte 16 8421 - - - F8h 4Dh R/W TACH Target 4096 2048 1024 512 256 128 64 32 FFh |
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