EMC2103 datasheet(20/85 Pages) MICROCHIP

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RPM-Based Fan Controller with Hardware Thermal Shutdown

Datasheet

 2013 Microchip Technology Inc.

DS0005250A-page 20

The EMC2103 will respond to the ARA in the following way if the ALERT pin is asserted.

1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication

from the device was not prematurely stopped due to a bus contention event).

2. Set the MASK bit to clear the ALERT pin.

4.7

SMBus Address

The EMC2103 SMBus Address is fixed at 0101_110xb.

Other addresses are available. Contact Microchip for details.

Attempting to communicate with the EMC2103 SMBus interface with an invalid slave address or invalid

protocol will result in no response from the device and will not affect its register contents.

4.8

SMBus Time-out

The EMC2103 includes an SMBus time-out feature. Following a 30ms period of inactivity on the

SMBus, the device will time-out and reset the SMBus interface.

4.9

Programming from EEPROM

Programming from EEPROM is only available for EMC2103-4 device. When enabled via the

SHDN_SEL pin (see Section 5.1.1), the EMC2103 will attempt to program itself from an EEPROM.

During this time, the EMC2103 acts as a simple SMBus Master to read data from a connected

EEPROM using the following procedure.

1. After power-up the EMC2103 waits for 10ms with the SMDATA and SMCLK pins tri-stated.

2. Once the wait period has elapsed, the EMC2103 sends a START signal followed by the 7 bit client

address 1010_000b followed by a ‘0’ and waits for an ACK signal from the EEPROM.

3. When the EEPROM sends the ACK signal, the EMC2103 will send a second start signal and

continue sending the Block Read Command (see Table 4.7) to the same slave address. It reads

256 data bytes from the EEPROM sending an ACK between each data byte. When 256 data bytes

have been received, it sends a NACK signal followed by a STOP bit.

4. Resets the device as an SMBus Client with slave address 0101_110xb.

If the EMC2103 does not receive an acknowledge bit from the EEPROM then the following will occur:

1. The ALERT pin will be asserted and will remain asserted until a Host device initiates

communication with the EMC2103 and reads the Status Register. The ALERT pin will be de-

asserted after a single Status Register read.

2. The EMC2103 will reset its SMBus protocol as a slave interface and start operating from the default

conditions with slave address 0101_110xb.

Table 4.7 Block Read Byte Protocol

START

SLAVE

ADDRESS

ACK

Address

ACK

START

SLAVE

ADDRESS

ACK

Data (00h)

. . .

0 -> 1

1010_000

00h

0 -> 1

1010_000

XXh

. . .

ACK

Data (01h)

ACK

Data (02h)

ACK

Data (02h)

. . .

ACK

Data (FFh)

NACK

STOP

XXh

. . .

XXh

1 -> 0

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