MCP19124 datasheet(37/236 Pages) MICROCHIP

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 2016 Microchip Technology Inc.

DS20005619A-page 37

MCP19124/5

TABLE 5-6:

MCP19124/5 A/D CONVERTER (ADC) CHARACTERISTICS (Note 1)

Electrical Specifications: Unless otherwise noted, operating temperature = -40°C

 TA  +125°C

Param.

No.

Sym.

Characteristic

Min.

Typ.†

Max.

Units

Conditions

AD01

NR Resolution

—

10 bits

bit

AD02

EIL Integral Error (2)

——

1LSb VREF_ADC = AVDD

VREF_ADC = VDD

AD03

EDL Differential Error (2)

——

1

LSb

No missing codes to 10 bits (3)

VREF_ADC = AVDD

VREF_ADC = VDD

AD04

EOFF Offset Error (2)

—+3.0

LSb

VREF_ADC = AVDD

VREF_ADC = VDD

AD07

EGN Gain Error (2)

—

2

6LSb VREF_ADC = AVDD

VREF_ADC = VDD

AD07

VAIN Full-Scale Range

AGND

—AVDD

VAVDD selected as ADC Reference

AGND

—VDD

VVDD selected as ADC Reference

AD08

ZAIN Recommended Impedance

of Analog Voltage Source

——



* These parameters are characterized but not tested.

† Data in ‘Typ.’ column is at VIN = 12V (AVDD = 4V), 25°C unless otherwise stated. These parameters are for

design guidance only and are not tested.

Note 1: When ADC is off, it will not consume any current other than leakage current. The power-down current

specification includes any such leakage from the ADC module. To minimize Sleep current the ADC Refer-

ence must be set to the (default) AVDD.

2: Total Absolute Error includes integral, differential, offset and gain errors.

3: The A/D conversion result never decreases with an increase in the input voltage and has no missing

codes.

TABLE 5-7:

MCP19124/5 A/D CONVERSION REQUIREMENTS

Electrical Specifications: Unless otherwise noted, operating temperature = -40°C

 TA  +125°C

Param.

No.

Sym.

Characteristic

Min.

Typ.†

Max.

Units

Conditions

AD130* TAD A/D Clock Period

1.6

—

9.0

µs

TOSC-based

A/D Internal RC

Oscillator Period

1.6

4.0

6.0

µs

ADCS<1:0> = 11 (ADRC mode)

AD131 TCNV Conversion Time

(not including

Acquisition Time) (1)

—11—

TAD

Set GO/DONE bit to new data in A/D

Result registers

AD132* TACQ Acquisition Time

—

11.5

—

µs

AD133* TAMP Amplifier Settling

Time

——

µs

AD134

TGO Q4 to A/D Clock Start

—

TOSC/2

—

* These parameters are characterized but not tested.

† Data in ‘Typ.’ column is at VIN = 12V (VDD =AVDD = 5V), 25°C unless otherwise stated. These parameters

are for design guidance only and are not tested.

Note 1: ADRESH and ADRESL registers may be read on the following TCY cycle.

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