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MSP430F423IPM Datasheet(PDF) 8 Page - Texas Instruments

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Part # MSP430F423IPM
Description  Mixed-Signal Microcontrollers
PDF  59 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP430F423IPM Datasheet(HTML) 8 Page - Texas Instruments

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MSP430F427, MSP430F425, MSP430F423
SLAS421B – APRIL 2004 – REVISED NOVEMBER 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: MSP430F427 MSP430F425 MSP430F423
Terminal Configuration and Functions
Copyright © 2004–2016, Texas Instruments Incorporated
Table 4-1. Terminal Functions (continued)
SIGNAL NAME
PIN NO.
I/O
DESCRIPTION
(2)
The LCD function is selected automatically when the applicable LCD module control bits are set, not with PxSEL bits.
R33
43
O
Output port of most positive analog LCD level (V1)
P2.1/UCLK0/S24
44
I/O
General-purpose digital I/O
External clock input for USART0 in UART or SPI mode or
clock output for USART0 in SPI mode
LCD segment output 24(2)
P2.0/TA2/S25
45
I/O
General-purpose digital I/O
Timer_A Capture: CCI2A input, Compare: Out2 output
LCD segment output 25(2)
P1.7/SOMI0/S26
46
I/O
General-purpose digital I/O
Slave out/master in for USART0 in SPI mode
LCD segment output 26(2)
P1.6/SIMO0/S27
47
I/O
General-purpose digital I/O
Slave in/master out for USART0 in SPI mode
LCD segment output 27(2)
P1.5/TACLK/ACLK/S28
48
I/O
General-purpose digital I/O
Timer_A and SD16 clock signal TACLK input
ACLK output (divided by 1, 2, 4, or 8)
LCD segment output 28(2)
P1.4/S29
49
I/O
General-purpose digital I/O
LCD segment output 29(2)
P1.3/SVSOUT/S30
50
I/O
General-purpose digital I/O
SVS: output of SVS comparator
LCD segment output 30(2)
P1.2/TA1/S31
51
I/O
General-purpose digital I/O
Timer_A, Capture: CCI1A, CCI1B input, Compare: Out1 output
LCD segment output 31(2)
P1.1/TA0/MCLK
52
I/O
General-purpose digital I/O
Timer_A, Capture: CCI0B input. Note: TA0 is only an input on this pin.
MCLK output
BSL receive
P1.0/TA0
53
I/O
General-purpose digital I/O
Timer_A, Capture: CCI0A input, Compare: Out0 output
BSL transmit
TDO/TDI
54
I/O
Test data output port, TDO/TDI data output or programming data input terminal
TDI/TCLK
55
I
Test data input or test clock input. The device protection fuse is connected to TDI.
TMS
56
I
Test mode select. TMS is used as an input port for device programming and test.
TCK
57
I
Test clock. TCK is the clock input port for device programming and test.
RST/NMI
58
I
Reset input
Nonmaskable interrupt input port
P2.5/URXD0
59
I/O
General-purpose digital I/O
Receive data in for USART0 in UART mode
P2.4/UTXD0
60
I/O
General-purpose digital I/O
Transmit data out for USART0 in UART mode



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