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AD7771BCPZ Datasheet(PDF) 94 Page - Analog Devices |
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AD7771BCPZ Datasheet(HTML) 94 Page - Analog Devices |
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94 / 99 page  Data Sheet AD7771 Rev. 0 | Page 93 of 98 GENERAL ERRORS REGISTER 1 Address: 0x059, Reset: 0x00, Name: GEN_ERR_REG_1 SPI CRC error A CRC of the memory m ap contents is run periodically to check for errors SPI invalid write address A CRC of the fuse contents is run periodically to check for errors in the fus es SPI invalid read addres s SPI clock counter error 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [7:6] RESERVED [0] SPI_CRC_ERR (R) [5] MEMMAP_CRC_ERR (R) [1] SPI_INVALID_WRITE_ERR (R) [4] ROM_CRC_ERR (R) [2] SPI_INVALID_READ_ERR (R) [3] SPI_CLK_COUNT_ERR (R) Table 132. Bit Descriptions for GEN_ERR_REG_1 Bits Bit Name Settings Description Reset Access [7:6] RESERVED Reserved 0x0 R 5 MEMMAP_CRC_ERR A CRC of the memory map contents is run periodically to check for errors 0x0 R 4 ROM_CRC_ERR A CRC of the fuse contents is run periodically to check for errors in the fuses 0x0 R 3 SPI_CLK_COUNT_ERR SPI clock counter error 0x0 R 2 SPI_INVALID_READ_ERR SPI invalid read address 0x0 R 1 SPI_INVALID_WRITE_ERR SPI invalid write address 0x0 R 0 SPI_CRC_ERR SPI CRC error 0x0 R GENERAL ERRORS REGISTER 1 ENABLE Address: 0x05A, Reset: 0x3E, Name: GEN_ERR_REG_1_EN Table 133. Bit Descriptions for GEN_ERR_REG_1_EN Bits Bit Name Settings Description Reset Access [7:6] RESERVED Reserved 0x0 R 5 MEMMAP_CRC_TEST_EN Memory Map CRC Test Error Enable 0x1 R/W 4 ROM_CRC_TEST_EN Fuse CRC Test Enable 0x1 R/W 3 SPI_CLK_COUNT_TEST_EN SPI Clock Counter Test Enable 0x1 R/W 2 SPI_INVALID_READ_TEST_EN SPI Invalid Read Address Test Enable 0x1 R/W 1 SPI_INVALID_WRITE_TEST_EN SPI Invalid Write Address Test Enable 0x1 R/W 0 SPI_CRC_TEST_EN SPI CRC Error Test Enable 0x0 R/W |
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