TSB41BA3APFP datasheet(38/66 Pages) TI

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TSB41BA3A

IEEE 1394b THREEPORT CABLE TRANSCEIVER/ARBITER

SLLS618B − JUNE 2004 − REVISED AUGUST 2004

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION (1394a-2000 INTERFACE)

LLC service request (continued)

The length of the stream varies depending on the type of request as shown in Table 13.

Table 13. Request Stream Bit Length

REQUEST TYPE

NUMBER OF BITS

Bus request

7 or 8

Read register request

Write register request

Acceleration control request

Regardless of the type of request, a start bit of 1 is required at the beginning of the stream, and a stop bit of 0

is required at the end of the stream. The second through fourth bits of the request stream indicate the type of

the request. In the descriptions below, bit 0 is the most significant and is transmitted first in the request bit stream.

The LREQ terminal is normally low.

Table 14 shows the encoding for the request type.

Table 14. Request Type Encoding

LR1−LR3

NAME

DESCRIPTION

000

ImmReq

Immediate bus request. Upon detection of idle, the PHY takes control of the bus immediately without arbitration.

001

IsoReq

Isochronous bus request. Upon detection of idle, the PHY arbitrates for the bus without waiting for a subaction gap.

010

PriReq

Priority bus request. The PHY arbitrates for the bus after a subaction gap, ignores the fair protocol.

011

FairReq

Fair bus request. The PHY arbitrates for the bus after a subaction gap, follows the fair protocol.

100

RdReg

The PHY returns the specified register contents through a status transfer

101

WrReg

Write to the specified register

110

AccelCtl

Enable or disable asynchronous arbitration acceleration

111

Reserved

For a bus request, the length of the LREQ bit stream is 7 or 8 bits as shown in Table 15.

Table 15. Bus Request

BIT(s)

NAME

DESCRIPTION

Start bit

Indicates the beginning of the transfer (always 1)

1−3

Request type

Indicates the type of bus request. See Table 14.

4−6

Request speed

Indicates the speed at which the PHY sends the data for this request. See Table 16 for the encoding of this field.

Stop bit

Indicates the end of the transfer (always 0). If bit 6 is 0, then this bit may be omitted.

Table 16 shows the 3-bit request speed field used in bus requests.

Table 16. Bus Request Speed Encoding

LR4−LR6

DATA RATE

000

S100

010

S200

100

S400

All Others

Invalid

TSB41BA3APFP Datasheet(PDF) 38 Page - Texas Instruments

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