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DAP018x Marking, DAP018DDR2G Datasheet(PDF) 20 Page - ON Semiconductor

Part # DAP018DDR2G
Description  PWM Current-Mode Controller for High-Power Universal Off-Line Supplies
PDF  28 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

DAP018DDR2G Datasheet(HTML) 20 Page - ON Semiconductor

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DAP018A/B/C/D/F
http://onsemi.com
20
The soft−start is activated in the following conditions:
• Startup sequence: when the user powers the adapter, the
peak current smoothly ramps−up from a low value
towards a maximum value defined by the sense resistor.
• In auto−recovery burst−mode (e.g. during a
non−latched short−circuit), each new set of pulses starts
with a soft−start sequence.
• When the brown−out pin senses a reset on the bulk
voltage, the controller restarts via a soft−start sequence,
just like a fresh power−on sequence.
* Please note that Speedking II does use implement the
soft−burst technique as built in the original Speedking circuit.
Internal Ramp Compensation
Ramp compensation is a known mean to cure
subharmonic oscillations. These oscillations take place at
half the switching frequency and occur only during
Continuous Conduction Mode (CCM) with a duty−cycle
greater than 50%. To lower the current loop gain, one usually
injects between 50 and 100% of the inductor downslope.
Figure 42 depicts how internally the ramp is generated.
* Please note that the ramp signal will be disconnected from
the CS pin, during the OFF time.
Figure 42. Inserting a Resistor
+
-
from FB Setpoint
L.E.B.
Latch
Reset
20 k
Rcomp
Rsense
CS
ON
1.8 V
0 V
Inserting a resistor in series with the current sense
information brings ramp compensation and stabilizes the
converter in CCM operation.
In the Speedking II controller, the oscillator ramp features
a 1.8 V swing. If our clock operates at a 65 kHz frequency,
then the oscillator slope corresponds to a 120 mV/
ms ramp.
In our flyback design, let’s assume that our primary
inductance Lp is 350 mH, and the SMPS delivers 12 V with
a Np:Ns ratio of 1:0.1. The off−time primary current slope is
thus given by:
Vout ) Vf @
NS
NP
LP
+ 371 mA msor 37 mV ms
when projected over a sense resistor Rsense of 0.1W, for
instance. If we select 75% of the downslope as the required
amount of ramp compensation, then we shall inject
27 mV/
ms. Our internal compensation being of 120 mV/ms,
the divider ratio (divratio) between Rcomp and the 20 kW is
0.225. Rcomp can therefore be obtained using the following
value:
Rcomp +
Rramp @ divratio
(1 * divratio) +
20 k
0.225
1 * 0.225 +
5.8 kW
Brown−out Protection
Versions B and D of the controller include a dedicated
circuitry which permanently monitors the bulk capacitor
level. Figure 43 depicts the comparator arrangement known
as a brown−out protection:
VBO
1V
IBO
Rupper
3.3Meg
Rlower
10k
BO
Brown Out
bulk
Figure 43. A Brown−out Circuit Protects the
Power Supply against Low Input Voltages
10 m



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