 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AXP288D Datasheet(PDF) 28 Page - Shenzhen X-Powers Technology Co ., Ltd |
|
|
|||||||||||||||||||||||||||||
AXP288D Datasheet(HTML) 28 Page - Shenzhen X-Powers Technology Co ., Ltd |
|
|
28 / 110 page  AXP288 PMIC Optimized For Multi-Core High-Performance System AXP288 Datasheet V1.06 Copyright © 2014 X-Powers Limited. All Rights Reserved. 28 Note: • Buck 3, 5, 6 and ELDO1 power up at the same time • PMIC Power up sequence has no dependency on SUSPWRDNAK signal • SLP_S0IX_B signal gates pmic performing the remainder power up sequence Table 9-3 Parameter Description Min Typical Max Units T0 Rail Ramp-Up Time from 10% to 90% voltage level 0.08 1 2 ms T1 Rail to Subsequent Rail Turn-On Delay 0.5 1 2.05 ms T2 V3P3A valid to RSMRST_B de-assertion 0 150 μs T3 VREFDQ valid (within +/-10% of its final normal value) to DRAMPWROK assertion 0 150 μs T4 RSMRST_B de-assertion toSLP_S0IX_B de-assertion 80 μs T5 SLP_S0IX_B de-assertion to first SX rail turn-on delay 0 8 16 ms T6 Core rails valid to VCCAPWEROK and COREPWROK assertion 1 ms T7 COREPWROK assertion to PLTRST_B de-assertion 60 μs |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
