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AX58200BT Datasheet(PDF) 66 Page - ASIX Electronics Corporation |
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AX58200BT Datasheet(HTML) 66 Page - ASIX Electronics Corporation |
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66 / 180 page ![]() 66 Copyright © 2019 ASIX Electronics Corporation. All rights reserved. AX58200 EtherCAT Slave Controller SoC ⚫ Support Timer0 ~ Timer3 time-out interrupt signal or capture interrupt signal to trigger EPWM, EADC, DAC and PDMA function ⚫ Supports internal capture triggered while internal ACMP output signal transition ⚫ Supports Inter-Timer trigger mode ⚫ Supports event counting source from internal USB SOF signal 2.8.2.2 PWM Function Features ⚫ Supports maximum clock frequency up to maximum PCLK ⚫ Supports independent mode for PWM generator with two output channels ⚫ Supports complementary mode for PWM generator with paired PWM output channel – 12-bit dead-time insertion with 12-bit prescale ⚫ Supports 12-bit prescale from 1 to 4096 ⚫ Supports 16-bit PWM counter – Up, down and up-down count operation type – One-shot or auto-reload counter operation mode ⚫ Supports mask function and tri-state enable for each PWM output pin ⚫ Supports brake function – Brake source from pin, analog comparator and system safety events (clock failed, Brown-out detection, SRAM parity error and CPU lockup) – Brake pin noise filter control for brake source – Edge detect brake source to control brake state until brake status cleared – Level detect brake source to auto recover function after brake condition removed ⚫ Supports interrupt on the following events: – PWM zero point, period point, up-count compared or down-count compared point events – Brake condition happened ⚫ Supports trigger EADC on the following events: – PWM zero point, period, zero or period point, up-count compared or down-count compared point events |
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