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TLE8110ED Datasheet(PDF) 48 Page - Infineon Technologies AG

Part # TLE8110ED
Description  Smart Multichannel Low Side Switch with Parallel Control and SPI Interface
PDF  74 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE8110ED Datasheet(HTML) 48 Page - Infineon Technologies AG

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Data Sheet
48
Rev. 1.0
2018-03-07
TLE8110ED
Smart Multichannel Low Side Switch with Parallel Control and SPI Interface
Control of the device
Figure 31
DRA, DRACL to dev.n and NOP command to dev.n+1
12.2.4
safeCOMMUNICATION
The device contains some safety features, which are improving the protection of the application against mal-
function in case of disturbance of the communication between the Micro Controller and the Device:
12.2.4.1 Encoding of the commands
The Commands are encoded. In case other bit-patterns, then the defined once are received, the commands
are ignored and the communication error can be read out with the command CMD_RSDS (see
Chapter 12.3.1.2).
12.2.4.2 Modulo-8 Counter
The modulo is the integral remainder in integral division. In data communications, a modulo based approach
is used to ensure that user information in SPI protocols is in the correct order. The device has a receiver-side
counter, and a defined counter size. The modulo counter specifies the number of subsequent numbers
available. In case of TLE8110ED Modulo 8 counter specifies 8 serial numbers. The modulo 8 counter ensures
that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of
DRA, DRACL to dev .n and NOP command to dev .n+1
from dev.n
to dev.n+1
S_CS
S_SI
S_SO
SPI daisy-chain word
t
Safe Communication with NOP command send to dev .n+1 and ignored response
Critical Communication with dev.n+1 response altered by dev .n response to previous DRA /DRACL
to dev.n
from dev.n+1
DRA/DRACL
NOP
from dev.n
to dev.n+1
to dev.n
from dev.n+1
SPI daisy-chain word
no response expected
ignored
response to DRA-/CL
from dev.n
to dev.n+1
S_CS
S_SI
S_SO
SPI daisy-chain word
t
to dev.n
from dev.n+1
DRA/DRACL
x-command
from dev.n
to dev.n+1
to dev.n
from dev.n+1
SPI daisy-chain word
response to x-command
8-bit altered by dev.n response to DRA-/CL
response to DRA-/CL



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