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CS98200 Datasheet(PDF) 16 Page - Cirrus Logic |
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CS98200 Datasheet(HTML) 16 Page - Cirrus Logic |
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16 / 60 page ![]() 16 Copyright 2002 Cirrus Logic (All Rights Reserved) DS581PP2 CS98200 Next Generation DVD Processor 2.2.4 SDRAM Interface CS98200 interfaces with either SDRAM or SGRAM for high data bandwidth transfer. Figure 8 shows the refresh cycle performed by CS98200. Symbol Description Min Typ Max Unit tmco Output Delay from M_CKO active edge 9 ns tmper M_CKO Period 8 ns tmdow M_D[31:0] delay from M_CKO 9 ns tmsur M_D[31:0] setup to M_CKO 3 ns tmhr M_D[31:0] hold time after M_CKO 2.5 ns Table 2. SDRAM Interface Characteristics M_CKO M_A[10:0] M_BS0_N, M_RAS_N M_CAS_N M_W E_N M_D[31:0] M_DQM_[3:0] M_AP M_BS1_N Figure 8. SDRAM Refresh Transaction D0 D1 D2 D3 D4 D5 D6 D7 C1 C2 C3 C4 C5 C6 C7 C0 R0 M_C KO M _ A_ [1 0:0] M_C KE M_R AS _N M_C AS _N M_W E_N M_D [31:0] M_D Q M[3:0] 0 F F Figure 9. SDRAM Burst Write Transaction |
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