MCP39F511A datasheet(7/68 Pages) MICROCHIP

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 2018 Microchip Technology Inc.

DS20006044A-page 7

MCP39F511A

Voltage Reference Input

Input Capacitance

—

Absolute Voltage on

VREF+ Pin

VREF+

AGND + 1.1V

—

AGND +1.3V

Power Specifications

Operating Voltage

AVDD, DVDD

2.7

—

3.6

DVDD Start Voltage

to Ensure Internal

Power-On Reset Signal

VPOR

DGND

—0.7

DVDD Rise Rate to

Ensure Internal

Power-On Reset Signal

SDVDD

0.05

—

V/ms

0–3.3V in 0.1s, 0–2.5V in

60 ms

AVDD Start Voltage to

Ensure Internal

Power-On Reset Signal

VPOR

AGND

—2.1

AVDD Rise Rate to

Ensure Internal Power-

On Reset Signal

SAVDD

0.042

—

V/ms

0 – 2.4V in 50 ms

Operating Current

IDD

—13

—

Data EEPROM Memory

Cell Endurance

EPS

100,000

—

E/W

Self-Timed

Write Cycle Time

TIWD

—4

—

Number of Total

Write/Erase Cycles

Before Refresh

RREF

—

10,000,000

—E/W

Characteristic Retention

TRETDD

—

years

Provided no other

specifications are violated

Supply Current During

Programming

IDDPD

—7

—

TABLE 1-1:

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications:

Unless otherwise indicated, all parameters apply at AVDD, DVDD = +2.7 to +3.6V, TA = -40°C to +125°C,

MCLK = 4 MHz, PGA GAIN = 1.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Test Conditions

Note

Calculated from reading the register values with no averaging, single computation cycle with accumulation interval of 4

line cycles.

Specification by design and characterization; not production tested.

N = Value in the Accumulation Interval Parameter register. The default value of this register is 2 or TCAL =80 ms for

50 Hz line.

Applies to Voltage Sag and Voltage Surge events only.

Applies to all gains. Offset and gain errors depend on the PGA gain setting. See Section 2.0 “Typical Performance

Curves”

for typical performance.

VIN =1.2 VPP =424 mVRMS @ 50/60 Hz. This parameter is established by characterization and is not 100% tested.

Variation applies to internal clock and UART only. All calculated output quantities can be temperature compensated to

the performance listed in the respective specification.

The internal ADC clock frequency is affected by the amplitude of the AC signal applied on the voltage channel,

decreasing the overall accuracy if the amplitude is low. In DC mode, the internal ADC clock frequency is constant.

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