9

AT25SF321

DS-25SF321–047F–8/2017

Figure 6-2. Read Array - 0Bh Opcode

6.2

Dual-Output Read Array (3Bh)

The Dual-Output Read Array command is similar to the standard Read Array command and can be used to sequentially

read a continuous stream of data from the device by simply providing the clock signal once the initial starting address has

been specified. Unlike the standard Read Array command, however, the Dual-Output Read Array command allows two

bits of data to be clocked out of the device on every clock cycle, rather than just one.

perform the Dual-Output Read Array operation, the CS pin must first be asserted and then the opcode 3Bh must be

clocked into the device. After the opcode has been clocked in, the three address bytes must be clocked in to specify the

location of the first byte to read within the memory array. Following the three address bytes, a single dummy byte must

also be clocked into the device.

After the three address bytes and the dummy byte have been clocked in, additional clock cycles will result in data being

output on both the SO and SI pins. The data is always output with the MSB of a byte first and the MSB is always output

on the SO pin. During the first clock cycle, bit seven of the first data byte is output on the SO pin, while bit six of the same

data byte is output on the SI pin. During the next clock cycle, bits five and four of the first data byte are output on the SO

and SI pins, respectively. The sequence continues with each byte of data being output after every four clock cycles.

When the last byte (3FFFFFh) of the memory array has been read, the device will continue reading from the beginning of

the array (000000h). No delays will be incurred when wrapping around from the end of the array to the beginning of the

array.Deasserting the CS pin will terminate the read operation and put the SO and SI pins into a high-impedance state.

The CS pin can be deasserted at any time and does not require that a full byte of data be read.

Figure 6-3. Dual-Output Read Array

SCK

CS

SO

MSB

MSB

23

1

0

00111011

67

5

41011

9

812394243

41

40

3738

3336

35

34

3132

2930444748

46

45

AAAA

AAA

AA

MSB

XXXXXXXX

MSB

MSB

MSB

D7

D6

D5

D4

D3

D2

D1

D0

D7

D6

D5

D4

D7

D6

D5

D4

D3

D2

D1

D0

DON'

T

OUTPUT

DAT

OUTPUT

DAT

HI

GH-

I

MPEDANCE