ST25R3911B datasheet(20/116 Pages) STMICROELECTRONICS

20 / 116 page

Figure 9. Exchange of signals with microcontroller

MOSI

MISO

I/O

MOSI

MISO

MOSI

Separate SPI input and

output signals to MCU

Bidirectional data

IO signal to MCU

MISO output is usually in tristate, it is only driven when output data is available. Due to this the MOSI and the

MISO can be externally shorted to create a bidirectional signal.

During the time the MISO output is in tristate, it is possible to switch on a 10 kΩ pull down by activating option bits

miso_pd1 and miso_pd2 in the IO configuration register 2.

Table 6 provides information on the SPI operation modes. Reading and writing of registers is possible in any

ST25R3911B operation mode. FIFO operations are possible in case en (bit 7 of the Operation control register) is

set and Xtal oscillator frequency is stable.

Table 6. SPI operation modes

Mode

Pattern (communication bits)

Related data

Mode

Trailer

Data byte (or more bytes in case of auto-incrementing)

FIFO Load

One or more bytes of FIFO data

FIFO Read

DirectCommand Mode

Writing data to addressable registers (Write mode)

Figure 10 and Figure 11 show cases of writing a single byte and writing multiple bytes with auto-incrementing

address. After the SPI operation mode bits, the address of register to be written is provided. Then one or more

data bytes are transferred from the SPI, always from the MSB to the LSB. The data byte is written in register on

falling edge of its last clock. In case the communication is terminated by putting /SS high before a packet of 8 bits

(one byte) is sent, writing of this register is not performed. In case the register on the defined address does not

exist or it is a read only register no write is performed.

ST25R3911B

Application information

DS11793 - Rev 6

page 20/116

ST25R3911B Datasheet(PDF) 20 Page - STMicroelectronics