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ST25R3911B Datasheet(PDF) 25 Page - STMicroelectronics |
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ST25R3911B Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 116 page ![]() Figure 18. SPI read timing ... ... ... DATAI ... DATAO DATAO tDOD tDOHZ /SS MOSI MISO SCLK Interrupt interface There are three interrupt registers implemented in the ST25R3911B: Main interrupt register contains information about six interrupt sources, while two bits reference to interrupt sources detailed in Timer and NFC interrupt register and Error and wake-up interrupt register. When an interrupt condition is met the source of interrupt bit is set in the Main interrupt register and the IRQ pin transitions to high. Table 8. IRQ output Name Signal Signal level Description IRQ Digital output CMOS Interrupt output pin The microcontroller then reads the Main interrupt register to distinguish between different interrupt sources. The interrupt registers 0x17, 0x18 and 0x19 are to be read in one attempt. After a particular Interrupt register is read, its content is reset to 0. Exceptions to this rule are the bits pointing to auxiliary registers. These bits are only cleared when corresponding auxiliary register is read. IRQ pin transitions to low after the interrupt bit(s) that caused its transition to high has (have) been read. Note: There may be more than one interrupt bit set in case the microcontroller does not immediately read the interrupt registers after the IRQ signal has been set and another event causing interrupt has occurred. In that case the IRQ pin transitions to low after the last bit that caused interrupt is read. If an interrupt from a certain source is not required, it can be disabled by setting corresponding bit in the Mask Interrupt registers. When masking a given interrupt source the interrupt is not produced, but the source of interrupt bit is still set in Interrupt registers. FIFO water level and FIFO status registers The ST25R3911B contains a 96 byte FIFO. In case of transmitting the Control logic shifts the data that was previously loaded by the external microcontroller to the Framing Block and further to the transmitter. During reception, the demodulated data is stored in the FIFO and the external microcontroller can download received data at a later moment. ST25R3911B Application information DS11793 - Rev 6 page 25/116 |
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