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SPC572L64F2 Datasheet(PDF) 66 Page - STMicroelectronics |
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SPC572L64F2 Datasheet(HTML) 66 Page - STMicroelectronics |
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66 / 112 page ![]() Electrical characteristics SPC572Lx 66/112 DocID027866 Rev 5 3.15.4 Power up/down sequencing The following table shows the constraints and relationships for the different power supplies. During power-up, all functional terminals are maintained into a known state as described in the following table. tVDASSERT CC D Voltage detector threshold crossing assertion —0.1 — 2 µs tVDRELEASE CC D Voltage detector threshold crossing de-assertion —5 — 20 µs 1. For VDD_LV levels, a maximum of 30 mV IR drop is incurred from the pin to all sinks on the die. For other LVD, the IR drop is estimated by the multiplying the supply current by 0.5 Ω. 2. The threshold for all PORs and LVDs are defined when the output transits to 1, i.e., when the sense goes above the reference. 3. Across process, temperature and voltage range. Table 32. Voltage monitor electrical characteristics(1) (continued) Symbol C Parameter Conditions Value(2) Unit Min Typ Max Table 33. Device supply relation during power-up/power-down sequence Supply 2(1) VDD_LV VDD_HV_IO VDD_HV_ADV VDD_HV_ADR ALTREF(2) VDD_LV VDD_HV_IO VDD_HV_ADV VDD_HV_ADR 5mA ALTREF 10 mA(3) 10 mA(3) 1. Grey cells: Supply 1 (row) can exceed Supply 2 (column), granted that external circuitry ensures current flowing from supply1 is less than absolute maximum rating current value provided. 2. ALTREF are the alternate references for the ADC that can be used in place of the default reference (VDD_HV_ADR_*). It is the SARB.ALTREF. 3. ADC performance is not guaranteed with ALTREFn above VDD_HV_IO/VDD_HV_ADV. Table 34. Functional terminals state during power-up and reset TERMINAL(1) POWER-UP(2) pad state RESET pad state Default pad state(3) Comments PORST Strong pull- down(4) Weak pull-down Weak pull-down Power-on reset pad ESR0(5) Strong pull-down Strong pull-down Weak pull-up Functional reset pad |
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