SPC572L64F2 datasheet(89/112 Pages) STMICROELECTRONICS

89 / 112 page

DocID027866 Rev 5

89/112

SPC572Lx

Electrical characteristics

111

Figure 36. RMII receive signal timing diagram

3.17.3.3

RMII transmit signal timing (TXD[1:0], TX_EN)

The transmitter functions correctly up to a REF_CLK maximum frequency of 50 MHz + 1%.

There is no minimum frequency requirement. The system clock frequency must be at least

equal to or greater than the TX_CLK frequency, which is half that of the REF_CLK frequency.

The transmit outputs (TXD[1:0], TX_EN) can be programmed to transition from either the

rising or falling edge of REF_CLK, and the timing is the same in either case. This options

allows the use of non-compliant RMII PHYs.

Figure 37. RMII transmit signal timing diagram

REF_CLK (input)

RXD[1:0] (inputs)

CRS_DV

Table 48. RMII transmit signal timing(1)

Symbol

Characteristic

Value

Unit

Min

Max

REF_CLK to TXD[1:0], TX_EN invalid

—

REF_CLK to TXD[1:0], TX_EN valid

—

REF_CLK pulse width high

35%

65%

REF_CLK period

REF_CLK pulse width low

35%

65%

REF_CLK period

1. RMII timing is valid only up to a maximum of 150

°C junction temperature.

REF_CLK (input)

TXD[1:0] (outputs)

TX_EN

SPC572L64F2 Datasheet(PDF) 89 Page - STMicroelectronics

SPC572L64F2 Datasheet(HTML) 89 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL