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LSM6DSV16BX Datasheet(PDF) 36 Page - STMicroelectronics |
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LSM6DSV16BX Datasheet(HTML) 36 Page - STMicroelectronics |
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36 / 148 page ![]() Table 20. Analog hub / Qvar channel ODR and bandwidth configuration AH_QVAR_LPF AH_QVAR_HPF AH / Qvar ODR (typ.)(1) AH / Qvar bandwidth (typ.) [low, high] 0 0 240 Hz [0 Hz, 318 Hz] 0 1 240 Hz [0.15 Hz, 318 Hz] 1 0 120 Hz [0 Hz, 14.8 Hz](2) 1 1 120 Hz [0.08 Hz, 14.8 Hz](2) 1. The analog hub / Qvar channel ODR is equal to 240 Hz if the notch filter is disabled, otherwise the ODR is equal to 120 Hz. 2. First -3 dB crossing point Qvar data can be stored in FIFO (by setting the AH_QVAR_BATCH_EN bit to 1 in the COUNTER_BDR_REG1 (0Bh) register) and can also be processed by MLC/FSM logic. The equivalent input impedance of the Qvar buffers can be selected by properly setting the AH_QVAR_C_ZIN_[1:0] bits in the CTRL7 (16h) register. Finally, the AN_QVAR_SW bit in the CTRL10 (19h) register allows internally swapping the input electrodes connected to the AH1/QVAR1 and AH2/QVAR2 pins. 6.7 Block diagram of filters Figure 23. Block diagram of filters ADC1 ADC2 Low-Pass Gyro UI Low-Pass Qvar dedicated filter Low-Pass TDM XL Regs array, FIFO interface Interrupt mng TDM interface Voltage and current references Trimming circuit and Test interface Clock and phase generator Power management FTP CS SCL/SPC SDA/SDI/SDO SDO/SA0 WCLK BCLK TDMout INT1 INT2 M E M S S E N S O R Low-Pass UI XL Gyro UI front-end XL UI/TDM front-end Temperature sensor & Qvar I2C/ /SPI MIPI I3C® ADC3 LSM6DSV16BX Block diagram of filters DS13771 - Rev 2 page 36/148 |
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