UPSD3422_V01 datasheet(67/300 Pages) STMICROELECTRONICS

67 / 300 page

Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

UPSD3422, UPSD3433, UPSD3434, UPSD3454

Interrupt system

67/300

–

Reserved, do not set to logic '1.'

–

Reserved, do not set to logic '1.'

1(1)

EI2CR,W

Enable I2C Interrupt

EUSB

R,W

Enable USB Interrupt

1 = Enable Interrupt, 0 = Disable Interrupt.

Table 22.

IP: interrupt priority register (SFR B8h, reset value 00h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

–

PT2

PS0

PT1

PX1

PT0

PX0

Table 23.

IP register bit definition

Bit

Symbol

R/W

Function

–

Reserved

–

Reserved

5(1)

1 = Assigns high priority level, 0 = Assigns low priority level.

PT2

R,W

Timer 2 Interrupt priority level

4(1)

PS0

R,W

UART0 Interrupt priority level

3(1)

PT1

R,W

Timer 1 Interrupt priority level

2(1)

PX1

R,W

External Interrupt INT1 priority level

1(1)

PT0

R,W

Timer 0 Interrupt priority level

0(1)

PX0

R,W

External Interrupt INT0 priority level

Table 24.

IPA: Interrupt Priority Addition register (SFR B7h, reset value 00h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PADC

PSPI

PPCA

PS1

–

PI2CPUSB

Table 25.

IPA register bit definition

Bit

Symbol

R/W

Function

7(1)

1 = Assigns high priority level, 0 = Assigns low priority level.

PADC

R,W

ADC Interrupt priority level

6(1)

PSPI

R,W

SPI Interrupt priority level

5(1)

PPCA

R,W

PCA Interrupt level

4(1)

PS1

R,W

UART1 Interrupt priority level

–

Reserved

–

Reserved

1(1)

PI2CR,W

I2C Interrupt priority level

PUSB

R,W

USB Interrupt priority level

Table 21.

IEA register bit definition (continued)

Bit

Symbol

R/W

Function

Obsolete

Product(s)

- Obsolete

Product(s)

UPSD3422 Datasheet(PDF) 67 Page - STMicroelectronics

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