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UPSD3422 Datasheet(PDF) 103 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 103 Page - STMicroelectronics |
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103 / 300 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD3422, UPSD3433, UPSD3434, UPSD3454 Standard 8032 timer/counters 103/300 20.6.3 Baud rate generator mode The RCLK and/or TCLK Bits in the SFR T2CON allow the transmit and receive baud rates on serial port UART0 to be derived from either Timer 1 or Timer 2. Figure 29 on page 106 illustrates Baud rate generator mode. When TCLK = 0, Timer 1 is used as UART0’s transmit baud generator. When TCLK = 1, Timer 2 will be the transmit baud generator. RCLK has the same effect for UART0’s receive baud rate. With these two bits, UART0 can have different receive and transmit baud rates - one generated by Timer 1, the other by Timer 2. Note: Bits RCLK1 and TCLK1 in the SFR named PCON (see Section Table 33.: PCON: power control register (SFR 87h, reset value 00h) on page 74) have identical functions as RCLK and TCLK but they apply to UART1 instead. For simplicity in the following discussions about baud rate generation, no suffix will be used when referring to SFR registers and bits related to UART0 or UART1, since each UART interface has identical operation. Example, TCLK or TCLK1 will be referred to as just TCLK. The Baud rate generator mode is similar to the Auto-reload mode, in that a roll over in TH2 causes the Timer 2 registers, TH2 and TL2, to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset with firmware. The baud rates in UART Modes 1 and 3 are determined by Timer 2’s overflow rate as follows: UART Mode 1,3 Baud Rate =Timer 2 Overflow Rate / 16 The timer can be configured for either “timer” or “counter” operation. In the most typical applications, it is configured for “timer” operation (C/T2 = 0). “Timer” operation is a little different for Timer 2 when it's being used as a baud rate generator. In this case, the baud rate is given by the formula: UART Mode 1,3 Baud Rate =fOSC/(32 x [65536 – [RCAP2H, RCAP2L])) where [RCAP2H, RCAP2L] is the content of the SFRs RCAP2H and RCAP2L taken as a 16-bit unsigned integer. A roll-over in TH2 does not set TF2, and will not generate an interrupt. Therefore, the Timer Interrupt does not have to be disabled when Timer 2 is in the Baud rate generator mode. If EXEN2 is set, a 1-to-0 transition on pin T2X will set the Timer 2 interrupt flag EXF2, but will not cause a reload from RCAP2H and RCAP2L to TH2 and TL2. Thus when Timer 2 is Baud rate generator 1x 1 0 x No overflow interrupt request (TF2) fOSC/2 – 1x 1 1 ↓ Extra Interrupt on pin T2X, sets TF2 Off x x 0 x x Timer 2 stops – – 1. ↓= falling edge. Table 62. Timer/counter 2 operating modes (continued) Mode Bits in T2CON SFR Pin T2X (1) Remarks Input clock RCLK or TCLK CP/ RL2 TR2 EXEN2 Timer, internal Counter, external (Pin T2, P1.0) Obsolete Product(s) - Obsolete Product(s) |
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