ST25R3916B datasheet(51/165 Pages) STMICROELECTRONICS

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DS13541 Rev 7

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ST25R3916B ST25R3917B

Application information

164

4.3.2

Communication interface selection

The active communication interface is selected via the I2C_EN pin. If this pin is pulled to

GND, the ST25R3916B and ST25R3917B operate in SPI mode. If this pin is pulled to

VDD_D, the ST25R3916B and ST25R3917B operate in I2C mode.

4.3.3

Serial peripheral interface (SPI)

The ST25R3916B and ST25R3917B have a standard serial peripheral interface with clock

polarity of 0, a clock phase of 1, and an active low slave select signal. Communication starts

with the MCU pulling BSS low. The MOSI pin is samples on the falling edge of SCLK, and

the state of the MISO pin is updated on the rising edge of the SCLK signal. Data is

transferred byte-wise, most significant bit first. Read and Write commands support an

address auto increment to reduce communication time. Table 11 provides an overview of

the SPI signals.

The MISO output is in tristate as long as no output data is available. Due to this the MOSI

and the MISO can be externally shorted to create a three-wire SPI. During the time the

MISO output is in tristate, it is also possible to switch on a 10 kΩ pull down by activating

option bits miso_pd1 and miso_pd2 in the IO configuration register 2.

Table 11. Serial data interface (4-wire interface) signal lines

Name

Signal

Signal level

Description

I2C_EN

Digital input

CMOS

Pull to GND for SPI operation

BSS

Digital input

Active low - Slave select

MOSI

Digital input

Master out - Slave in (MCU → ST25R3916B

and ST25R3917B)

MISO

Digital output with tristate

Master in - Slave out (ST25R3916B and

ST25R3917B → MCU)

SCLK

Digital input

Serial clock

IRQ

Digital output

Active high - Interrupt output pin

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