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ST25R3916B Datasheet(PDF) 17 Page - STMicroelectronics |
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ST25R3916B Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 165 page ![]() DS13541 Rev 7 17/165 ST25R3916B ST25R3917B Description 164 2.2.7 Quartz crystal oscillator The quartz crystal oscillator operates with 27.12 MHz crystals. At start-up the transconductance of the oscillator is increased to achieve a fast start-up. Since the start-up time varies with crystal type, temperature and other parameters, the oscillator amplitude is observed and an interrupt is generated when stable oscillator operation is reached. The oscillator block also provides a clock signal to the external microcontroller (MCU_CLK), according to the settings in the IO configuration register 1. 2.2.8 Power supply regulators The integrated power supply regulators ensures a high power supply rejection ratio (PSRR) for the complete system. Three voltage regulators, one for the analog block, one for the digital block, and one for the RF output drivers, are available to decouple noise sources from the ST25R3916B and ST25R3917B. A fourth voltage regulator generates the reference voltage for the analog receivers (AGDC, analog ground). The RF output driver voltage regulator is configured automatically by the ST25R3916B and ST25R3917B based on the systems power supply stability and RF output power (see Section 4.4.10: Adjust regulators for more details). 2.2.9 POR and bias This block provides bias currents and reference voltages to all other blocks. It also incorporates a Power on Reset (POR) circuit that provides a reset at power-up and at low supply levels. 2.2.10 RC oscillator and Wake-up timer The ST25R3916B and ST25R3917B have two possibilities for low power detection of a card presence (phase measurement, amplitude measurement). The RC oscillator and the register configurable Wake-up timer are used to periodically trigger the card presence detection in the low power card detection modes. 2.2.11 TX encoding This block encodes the transmit frames according to the selected RF mode and bit rate. The SOF (start of frame), EOF (end of frame), CRC and parity bits are generated automatically. The data to transmit are taken from the FIFO. In Stream mode the framing is bypassed. The FIFO data directly defines the modulation data sent to the transmitter. In Transparent mode, the framing and FIFO are bypassed, and the MOSI pin directly drives the modulation of the transmitter. 2.2.12 RX decoding This block decodes received frames according to the selected RF mode and bitrate. The received data is written to the FIFO. In Stream mode the framing is bypassed. The digitized subcarrier signal is directly stored in the FIFO. |
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