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DA6021 Datasheet(PDF) 33 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 33 Page - Renesas Technology Corp |
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33 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 33 of 224 www.dialog-semiconductor.com Event Trigger Conditions (all mandatory) Next state Note Input power Source removal and Main Battery Removal/Depletion VSYS < VMIN VBATBKUP>VMIN G3 DA6021 loses states, except RTC powered registers Restart with default values except RTC powered registers VSYS < VMIN VBATBKUP<VMIN DA6021 loses states, RTC powered registers loses states Re-start with default values See event and conditions in Cold off Triggers SOC_G3 See “Cold Off Triggers” Power Button Held Power Button held time < PBCONFIG .FCOT[3:0] S0iX DA6021 passes PWRBTN_B information to SoC. SoC toggles SLP_S0iX_B = 0 to enter S0iX Warm Reset PLTRST_B=0 SOC_S0 Resets I2C and SVID SLP_S0iX_B SLP_S0iX_B=0 Or SLP_S3_B=0 Or SLP_S$_B =0 SOC_S0iX Enter S0iX state Table 8:SOC S0 State Transition SOC S0iX State 9.3.2 The SOC supports three possible standby states: S0IX, S3, and S4. Each of these states represents a different level of SOC standby, with S0IX being the “shallowest” (highest power) and S4 being the “deepest” (lowest power). Each of these three sub-states has its own entry task list, required because of the different states of power rails in each. The entering and exiting of the SOC S0IX state is controlled by a signal which is delivered to DA6021 by the SOC via a dedicated physical pin SLP_S0IX_B. Rails that are on: o They are shown in the power sequencing diagrams o VRs shall be placed in PFM/power save mode o Internal PMIC rails Interfaces available: o SVID is ON in S0IX o I2C is ON in S0IX Input source comparators and interrupts active. All registers powered, with states retained. Thermal monitoring and VR current measurements are disabled by default. If enabled, the measurements are taken at standby frequency. The events causing a transition out of the ‘SOC S0IX’ state are shown in the table below. Event Trigger Conditions (all mandatory) Next state Note Input power Source removal and Main Battery Removal/Depletion VSYS < VMIN VBATBKUP>VMIN G3 DA6021 loses states, except RTC powered registers Restart with default values except RTC powered registers VSYS < VMIN VBATBKUP<VMIN DA6021 loses states, RTC powered registers loses states Re-start with default values See event and conditions in Cold off Triggers SOC_G3 See “Cold Off Triggers” Power Button Held Power Button held time < PBCONFIG S0iX DA6021 passes PWRBTN_B information to SoC. SoC |
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