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DA6021 Datasheet(PDF) 23 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 225 page  DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 23 of 224 www.dialog-semiconductor.com V2P85SX 1 V2P85SX V2P85SX output voltage OP VSYSU VSYSU_EN 1 VSYS VSYSU input voltage OP VSYSU_FB 1 VSYSU VSYSU output voltage IP VSYSS VSYSS 1 VSYSS VSYSS output voltage OP VSYS_SX VSYS_SX_EN# 1 VSYS_SX VSYS_SX enable signal OD VSYS_SX_FB 1 VSYS_SX VSYS_SX sense signal IA V1P0S V1P0SEN 1 V1P0A V1P0S enable signal OD V1P0S_FB 1 V1P0A V1P0S sense signal IA V1P0SX V1P0SXEN 1 V1P0A V1P0SX enable signal OD V1P0SX_FB 1 V1P0A V1P0SX sense signal IA BG VREF12 1 VREF12 Bandgap reference voltage OP IREF12 1 IREF12 Bandgap reference current OP VREF12_QUIET 1 VSS_QUIET quiet ground connection IP VLP VLP 1 VLP VLP output voltage OP VLP_GND 1 VLP_GND VLP ground IP VSYS1/2 VSYS 2 VSYS DA6021 input supply voltage IP SVID SVID_CLK 1 V1P0S Serial VID clock signal ID SVID_DIO 1 V1P0S Serial VID data in/out IOD SVID_ALERT_B 1 V1P0S Serial VID to SoC interrupt OD Power source detection & charger control VDCIN_SENSE 1 5V AC/DC adapter input voltage detection (20V via ext. components) IP ACPRESENT 1 V1P8 Valid AC/DC adapter voltage detection OD VBUSSENSE 1 VUSBPHY USB input voltage detection (20V via ext. components) IP CHGDET_B 1 VSYS USB DCP detection from USBPHY (0=USB DCP) ID CHGRINT_B 1 Battery charging status 0=charging in progress 1=charging complete IA ILIM[1:0] 2 VSYS Charging current limit OD System control I2C_CLK 1 V1P8S I2C clock signal ID I2C_DATA 1 V1P8S I2C data IO IOD IRQ 1 V1P8S Interrupt signal to So OD I2CM_CLK 1 VSYS I2C clock signal OD I2CM_DATA 1 VSYS I2C data IO IOD PWRBTNIN_B 1 VSYS System power button input ID PWRBTN 1 V1P8A System power button output OD PLTRST_B 1 V1P8A Platform reset signal OD SLP_S0iX_B 1 V1P8A Standby S0iXtrigger 0=enter S0iX 1=exit S0iX ID SLP_S3_B 1 V1P8A Sleep S3 trigger 0=enter S3 1=exit S3 ID SLP_S4_B 1 V1P8A Sleep S4 trigger 0=enter S4 1=exit S4 ID RSMRST_B 1 V3P3A Resume reset to SoC, de- assertion (=1) after V3P3A OD |
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